“School of Cognitive”
Back to Papers HomeBack to Papers of School of Cognitive
| Paper IPM / Cognitive / 13337 |
|
||||||||
| Abstract: | |||||||||
|
A nonlinear ADC dedicated to the digitization of neural signals in implantable brain-machine interfaces is presented. Benefitting from an exponential quantization function, effective resolution of the proposed ADC in the digitization of action potentials is almost 2 bits more than its physical number of bits. Hence, it is shown in this paper that the choice of a proper nonlinear quantization function helps reduce the outgoing bit rate carrying the recorded neural data. Another major benefit of digitizing neural signals using the proposed signal-specific ADC is the considerable reduction in the background noise of the neural signal. The 8-b exponential ADC reported in this paper digitizes large action potentials with maximum resolution of 10.5 bits , while quantizing the small background noise is performed with a resolution of as low as 3 bits. Fully-integrated version of the circuit was designed and fabricated in a 0.18-μm CMOS process, occupying 0.036 mm2 silicon area. Designed based on a two-step successive-approximation register ADC architecture, the proposed ADC employs a piecewise-linear approximation of the target exponential function for quantization. Operating at a sampling frequency of 25 kS/s (typical for intra-cortical neural recording) and with a supply voltage of 1.8 V, the entire chip, including the ADC and reference circuits, dissipates 87.2 μW. According to the experiments, Noise-Content-Reduction Ratio (NCRR) of the ADC is 41.1 dB.
Download TeX format |
|||||||||
| back to top | |||||||||
